A CPU made from read only memory (ROM)

How?

Read this article ROM + ROM + … + ROM = CPU

The Mill CPU architecture videos.

https://millcomputing.com/docs/

Ivan Godard talks on different aspects of the Mill CPU family architecture. The Mill CPU family is an attempt to develop a new high performing architecture with high ILP(instruction level parallelism) on the principles different from mainstream CPU design practice. The real treasure is Ivan Godard's ability to introduce the current state of the field in concise form and then seamlessly move to the Mill architecture that uses a new approach.

Dr Onur Mutlu's Lecture and Videos

 Probably the most comprehensive online course on computer architecture.

https://users.ece.cmu.edu/~omutlu/lecture-videos.html

The Journal of Instruction-Level Parallelism

Looks like the Journal is defunct but nevertheless worth browsing

http://www.jilp.org/

CS150 Components and Design Techniques for Digital Systems

http://www-inst.eecs.berkeley.edu/~cs150

An old ARM clocking scheme

An interesting fact about the old ARM clocking scheme, ((c) ARM System on chip architecture )

Unlike the MU0 example presented in Section 1.3 on page 7, most ARMs do not
operate with edge-sensitive registers; instead the design is based around 2-phase
non-overlapping clocks, as shown in Figure 4.8, which are generated internally from
a single input clock signal. This scheme allows the use of level-sensitive transparent
latches. Data movement is controlled by passing the data alternately through latches
which are open during phase 1 and latches which are open during phase 2. The
non-overlapping property of the phase 1 and phase 2 clocks ensures that there are
no race conditions in the circuit.