For those interested in nature of setup and hold time for D flip-flop there is a good explanation at www.edn.com, just follow the link Understanding the basics of setup and hold time
I borrowed two illustrations that show the reason for setup and hold time
Reason for SETUP Time:
The time it takes data D to reach node Z is called the setup time.
Reason for HOLD Time:
The darkened line shows the conducting path for hold time.
For the reference the definition for propagation and contamination delays borrowed from here ( (c) 6004 MIT )
For the reference the definition for propagation and contamination delays borrowed from here ( (c) 6004 MIT )
Altogether, the illustrations from here ( (c) Nilesh Goel )
Setup and Hold Time for D flip-flop
Combinational Propagation and Contamination Delay
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